Systems Engineering Intern - Silicon PDK
Texas Instruments
The role will contribute to building a scalable, automated design flows that bridge schematic capture, layout generation, and simulation / testbench infrastructure within a Cadence-based platform. This position offers hands-on exposure to advanced PIC design enablement and electronic-photonics co-design workflows with close collaboration with the silicon photonics designers, RF designers, and layout engineers.
Responsibilities may include, but are not limited to:
Assist in the development of schematic-driven layout flows for PIC, including creating of symbols, layout, ports, and connectivity.
Translate schematic-level designs into layout and creat Parametric Cells using in SKILL scripting.
Support design enablement and PDK development, including building and maintaining a PDK and schematic-driven layout automation.
Contribute to the definition and implementation of design rules and verification methodologies, including design rule check (DRC) and layout versus schematic (LVS) checks for connectivity and netlist validation.
Support optical-electrical co-design by linking photonic and RF blocks using Verilog-A behavior models and S-parameters for system-level simulation.
Collaborate with cross-functional teams to validate flows through integrated simulation and testbench development
- Engineer your future. We empower our employees to truly own their career and development. Come collaborate with some of the smartest people in the world to shape the future of electronics.
- We're different by design. Diverse backgrounds and perspectives are what push innovation forward and what make TI stronger. We value each and every voice, and look forward to hearing yours. Meet the people of TI
- Benefits that benefit you. We offer competitive pay and benefits designed to help you and your family live your best life. Your well-being is important to us.
TI does not make recruiting or hiring decisions based on citizenship, immigration status or national origin. However, if TI determines that information access or export control restrictions based upon applicable laws and regulations would prohibit you from working in this position without first obtaining an export license, TI expressly reserves the right not to seek such a license for you and either offer you a different position that does not require an export license or decline to move forward with your employment.
Minimum Requirements:
Currently pursuing a PhD degree in Electrical Engineering, Applied Physics, Photonics, or related field
Strong hands-on experience with Cadence Virtuoso or other photonic design enablement tools for design enablement platforms.
Fundamental understanding of photonics integrated circuits of passive and active components with experience in photonics design using tools such as Lumerical and HFSS.
Preferred Qualifications:
Demonstrated experience contributing to successful tape-outs at leading foundries
Familiarity with Electronic-Photonic Design Automation (EPDA) flows, including co-simulating photonic circuits with CMOS driver/TIA circuits.
Experience using Python-based layout frameworks to automate photonic layout routing.
Experience in creating or modifying Parametric Cells with SKILL scripting.