Analog IC Design Engineer
TalentLab Inc
Analog IC Design Engineer
Our client, a leader in advanced connectivity solutions, is shaping the future of high-speed data communication—powering innovation across AI, data centers, 5G infrastructure, autonomous vehicles, and beyond. As part of their Connectivity Products Group, you’ll help drive the development of next-generation direct detect and Coherent DSP solutions enabling 800Gbps, 1.6Tbps, and higher-speed interconnects.
As an Analog IC Design Engineer, you’ll contribute to cutting-edge analog and mixed-signal circuit design from concept through silicon characterization, collaborating with an elite team to push performance and power boundaries across advanced CMOS nodes.
What You’ll Do
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Design and verify high-performance analog blocks aligned with system and industry specifications.
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Collaborate with a team of top-tier engineers—supporting and being supported through shared ownership and technical leadership.
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Optimize circuits to meet power, performance, and area (PPA) goals.
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Propose and implement design and verification strategies to ensure robust, silicon-proven circuits.
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Guide and review physical layout to reduce parasitics, stress, and process variability.
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Present simulation results for peer review and technical validation.
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Document design features, testbench setups, and key performance indicators.
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Support the characterization team to validate post-silicon performance and correlate measurements to simulations.
What You’ll Need
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MSc or PhD in Electrical Engineering, Engineering Science, or a related technical field.
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5+ years of experience in analog IC design, preferably with silicon-proven results.
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Hands-on experience with advanced CMOS nodes.
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Design experience with any of the following blocks: CTLE, slicers, high-speed ADCs, VCOs, PIs, PLLs, bandgaps, regulators, serializers/deserializers, phase detectors, or high-speed TX/RX architectures.
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Strong understanding of parasitic-aware layout and reliability considerations (aging, stress, EM).
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Proficiency with EDA tools for schematic, layout, and verification workflows.
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Solid simulation background, including SPICE and behavioral modeling using Verilog-A.
Location: Toronto – reporting to the Senior Director, Connectivity Products Group.
Please reach out to nick.weiszhaar@talentlab.com with your resume if you're a fit for the position and interested in learning more.