Category Engineering Hire Type Employee Job ID 12242 Remote Eligible No Date Posted 28/07/2025

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are an accomplished and experienced R&D engineering professional with over 8 years in logic circuit characterization, logic IP view generation, and advanced timing/power methodologies for standard cells. You possess a strong technical foundation in both basic and advanced modeling approaches, including LVF, CCS, and MIS, and demonstrate mastery in leveraging circuit simulators such as Hspice and Finesim. Your hands-on familiarity with Siliconsmart, PrimeLib, and deep knowledge of combinational, dynamic, sequential, and multibit logic circuits position you as a subject matter expert in the field.

You have a robust understanding of liberty constructs and syntax, and your experience spans the full ASIC flow—from front-end design to back-end integration. Your skills in STA and power analysis tools are complemented by advanced scripting abilities in TCL, Perl, and Python, allowing you to automate and optimize complex workflows. You thrive in collaborative environments, working seamlessly with cross-functional teams to deliver high-quality EDA solutions.

Your communication skills—both written and verbal—enable you to convey complex technical concepts with clarity, making you an effective partner to domain experts across Logic IPs. You are proactive, continually seeking out new methodologies and best practices, and your commitment to learning ensures you stay at the forefront of innovation. With a results-driven mindset and a passion for excellence, you are ready to make a significant impact at Synopsys.

What You’ll Be Doing:

• Developing and validating logic IP views and timing/power characterization methodologies for standard cells, ensuring industry-leading accuracy.
• Leveraging circuit simulators such as Hspice and Finesim to perform detailed characterization and ensure robust model quality.
• Utilizing advanced EDA tools like Siliconsmart and PrimeLib for comprehensive characterization and validation workflows.
• Collaborating with cross-functional teams—including design, verification, and product engineering—to deliver high-quality EDA views for logic IPs.
• Extracting, analyzing, and interpreting large datasets to drive methodological improvements and support innovative solutions.
• Writing, optimizing, and maintaining scripts in TCL, Perl, and Python to automate characterization processes and improve operational efficiency.
• Engaging with domain experts to gather requirements, share insights, and contribute to technical discussions that drive innovation.

The Impact You Will Have:

• Advance the accuracy and reliability of logic IP views, directly influencing the quality of silicon chip design and manufacturing.
• Contribute to the creation of high-performance silicon chips and software content, supporting Synopsys’ leadership in the industry.
• Drive innovation and efficiency by developing and refining characterization methodologies and leveraging advanced simulation tools.
• Ensure seamless integration and timely delivery of EDA views for logic IPs, enabling customer success and satisfaction.
• Enhance data extraction and analysis processes, providing actionable insights that inform strategic decision-making and product development.
• Foster a culture of collaboration and continuous improvement within and across teams, sharing knowledge and best practices.

What You’ll Need:

• 8+ years of experience in logic circuit characterization flows, generation, and validation of Logic IP views.
• Proficiency with circuit simulators such as Hspice and Finesim.
• Extensive hands-on experience with EDA tools like Siliconsmart and PrimeLib.
• Strong understanding of combinational, dynamic, multibit, and sequential logic circuits.
• In-depth knowledge of liberty constructs, syntax, and timing/power characterization methodologies (LVF, CCS, MIS).
• Working knowledge of STA and power analysis tools within ASIC design flows.
• Advanced scripting skills in TCL, Perl, and Python for workflow automation.
• Exceptional problem-solving abilities and a results-oriented approach.
• Excellent verbal and written communication skills, with the ability to engage technical and non-technical stakeholders.

Who You Are:

You are a proactive, innovative, and collaborative team member with a passion for logic IP characterization and validation. Your curiosity drives you to explore new technologies and methodologies, and your adaptability ensures you can thrive in a fast-paced, evolving environment. You are detail-oriented, analytical, and take pride in delivering high-quality results. Your willingness to share knowledge and mentor others, combined with strong interpersonal skills, makes you a valued contributor to any team.

The Team You’ll Be A Part Of:

You’ll join a dynamic and forward-thinking team focused on developing and validating high-performance logic IP views and characterization methodologies. Our group values continuous improvement and teamwork, collaborating closely with cross-functional partners to deliver industry-leading solutions. Together, we drive technological innovation that shapes the future of semiconductor design and verification.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.