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ASIC Digital Verification Engineer

Synopsys

Synopsys

Other Engineering
Washington, DC, USA
Posted on Apr 4, 2025
Category Engineering Hire Type Employee Job ID 10361 Remote Eligible No Date Posted 02/04/2025

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

ASIC Digital Verification Engineer

We are seeking a highly motivated and innovative Verification Engineer. The candidate will be part of a highly experienced ASIC mixed-signal design and verification team, targeting the current and next generation of DRAM interface products (DDR and HBM), applying AI and algorithms to address complex business needs.

The position is suitable for a wide range of candidates, from junior to experienced professionals, offers an excellent opportunity to work with a skilled team of digital and mixed signal engineers, delivering high-end mixed-signal designs from specification development to performing functional and performance tests on the test-chips.


Responsibilities:

  • Generates verification specifications.
  • Determines test bench design and test cases.
  • Evaluates and exercises various aspects of the development flow which may include such items as Verilog/SystemVerilog development, functional simulation, constraint development, test planning, behavioral modeling, and verification coverage metrics.
  • Generates documentation for test plans, verification environments, and usage.
  • Participate in evaluation and troubleshooting of digital and mixed signal designs.

Key Qualifications

  • Candidate should have a proven desire to learn and explore new technologies.
  • Demonstrates good communication skills in English.
  • Demonstrates good analysis and problem-solving skills.
  • Prior knowledge CAD tools for development.
  • Knowledge of Verilog and SystemVerilog.
  • Experience with scripting languages, object-oriented coding and Unix environment

Preferred Experience

  • Relevant work experience in the industry
  • Ability to work independently, precisely and to drive innovation
  • Experience in technical lead role
  • Knowledge of high speed interface protocols such as HBM, DDR and DFI;
  • Understanding of verification methodologies such as UVM and Formal

At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.