Layout Design, Staff Engineer
Synopsys
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a highly skilled Layout Design Engineer with over 6 years of experience in Analog Mixed-Signal IP layout and verification. You possess a deep understanding of high-speed analog layouts and the intricacies of deep submicron effects and mitigation strategies. Your expertise includes advanced tool usage and floor-planning techniques, and you are well-versed in CMOS and FinFET layouts and process technology. With a background in developing physical layouts for High-Speed Analog Integrated Circuits, you are proficient in CAD tools such as Custom Designer, Cadence Virtuoso, Calibre, ICV, and STAR-RXCT.
As a professional who thrives in both independent and collaborative environments, you are adept at providing regular updates on project status and networking with senior internal and external personnel. You have a strong desire to learn and explore new technologies, coupled with excellent analytical and problem-solving skills. Your familiarity with ESD and latch-up layout design considerations, power routes, EM, and IR considerations, as well as DFM, further enhances your capability to deliver high-quality designs. Your scripting skills for layout automation, combined with excellent communication skills, make you an ideal fit for our team.
What You’ll Be Doing:
- Developing physical layouts for High-Speed Analog Integrated Circuits within the Analog and Mixed Signal IP group.
- Utilizing CAD tools such as Custom Designer, Cadence Virtuoso, Calibre, ICV, and STAR-RXCT for layout design and verification.
- Implementing advanced floor-planning techniques and understanding the verification flow for high-speed analog layouts.
- Collaborating with a team of Analog/Mixed Signal Custom Layout Design Engineers on SerDes and Analog Mixed Signal IP blocks.
- Providing regular updates to the manager on project status and determining approaches to solutions independently.
- Networking with senior internal and external personnel to leverage expertise and ensure project success.
The Impact You Will Have:
- Contributing to the development of high-performance silicon chips that power the next generation of technology.
- Enhancing the reliability and efficiency of our Analog and Mixed Signal IP through meticulous layout design and verification.
- Driving innovation in high-speed analog integrated circuits and ensuring cutting-edge performance.
- Collaborating with cross-functional teams to deliver robust and scalable design solutions.
- Providing technical expertise and insights that influence project direction and outcomes.
- Ensuring compliance with industry standards and best practices, thereby maintaining Synopsys' reputation for excellence.
What You’ll Need:
- 6+ years of experience in Analog Mixed-Signal IP layout and verification.
- Proficiency in CAD tools such as Custom Designer, Cadence Virtuoso, Calibre, ICV, and STAR-RXCT.
- Advanced understanding of deep submicron effects and mitigation strategies.
- Solid understanding of CMOS and FinFET layouts and process technology.
- Experience in developing high-speed analog layouts and familiarity with ESD and latch-up design considerations.
Who You Are:
- A highly analytical and problem-solving individual with a keen eye for detail.
- A proactive learner with a strong desire to explore new technologies.
- An excellent communicator who can effectively engage with internal and external stakeholders.
- A collaborative team player who thrives in both independent and team-oriented environments.
- A dedicated professional with strong debugging and troubleshooting skills.
The Team You’ll Be A Part Of:
You will be part of the Analog and Mixed Signal IP group at Synopsys. This team is focused on developing physical layouts for high-speed analog integrated circuits, including SerDes and Analog Mixed Signal IP blocks. You will collaborate with a talented group of engineers who are passionate about driving innovation and delivering high-quality design solutions.
Rewards and Benefits:
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.