R&D Engineering Director, Emulation

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

We are looking for a seasoned and enthusiastic professional who thrives on problem-solving, is committed to ongoing learning, and is eager to work with advanced technologies. You possess outstanding communication skills and enjoy working in a dynamic team of highly talented engineers. As the Director R&D Engineer - Emulation Center of Excellence, you have a deep understanding of ASIC emulation methodologies and a commitment to optimizing performance and reliability. You are experienced in leading teams, managing regression analysis, and collaborating closely with design and verification teams. Your expertise in integrating verification environments and RTL into emulation platforms will be crucial in this role.

What You’ll Be Doing:

• Lead the integration of verification environments and RTL into the Zebu emulation platform for seamless operation.
• Execute emulation tests, debug issues, and optimize environments for improved performance.
• Manage and analyze regression results to identify issues and ensure comprehensive test coverage.
• Collaborate with design and verification teams to align requirements and resolve bottlenecks effectively.
• Innovate and refine emulation methodologies to enhance scalability, efficiency, and reliability.
• Define requirements on simulation environments to enable mapping to emulation environments.
• Define emulation targets and test plans to be prioritized for emulation.
• Develop emulation friendly Real Number Models (RNM) for mixed-signal IPs to expedite digital and firmware verification.
• Define emulation planning across the IP titles, report status, risks, and mitigations to emulation plan.
• Standardize emulation flows across PHY and controller IPs, working closely with Synopsys’ Zebu team.
• Represent Synopsys on customer calls regarding emulation validation strategy, plans, and progress.
• Lead a team of emulation engineers, providing direction and leadership.

The Impact You Will Have:

• Drive the integration of cutting-edge verification environments into emulation platforms, ensuring high performance and reliability.
• Enhance the efficiency of the emulation process, leading to faster and more reliable verification of complex designs.
• Ensure comprehensive test coverage through meticulous regression analysis and issue identification.
• Collaborate effectively with design and verification teams to optimize emulation strategies and resolve bottlenecks.
• Innovate emulation methodologies, contributing to the scalability and efficiency of verification processes.
• Develop and implement emulation models that accelerate the verification of mixed-signal IPs.
• Standardize emulation processes across various IPs, promoting consistency and best practices.
• Represent Synopsys in customer interactions, showcasing expertise in emulation validation.
• Lead and mentor a team of emulation engineers, fostering a collaborative and innovative environment.

What You’ll Need:

• 10+ years of hands-on emulation experience on platforms such as Palladium, Veloce, or Zebu.
• Extensive knowledge of design mapping, testbench mapping, and transactor development for emulation environments.
• Expertise in hardware/software debug solutions tailored to emulation, with excellent debugging skills in functional and gate-level simulations.
• Strong programming skills in object-oriented languages such as C++, Java, or Python, and scripting languages like PERL, TCL, and Shell scripts.
• Hands-on experience with verification metrics, including functional, code, and assertion coverage.
• Comprehensive knowledge of protocols, including PCIe, I2C, and Ethernet packet headers.
• Familiarity with multi-domain verification environments, SystemVerilog DPI, and collaborative workflows using Git, Jenkins, or CI/CD pipelines.
• Strong analytical and problem-solving skills, with a proven ability to mentor junior engineers and collaborate effectively.

Who You Are:

• A strong leader with excellent communication and mentoring skills.
• Innovative and committed to continuous improvement.
• Detail-oriented with a strategic mindset.
• Collaborative, with the ability to work effectively in a team environment.
• Passionate about technology and eager to work on cutting-edge projects.

The Team You’ll Be A Part Of:

You will be part of a dynamic team focused on driving innovation and excellence in the emulation of state-of-the-art protocol IPs. The team collaborates closely with design and verification teams to ensure the successful integration and optimization of verification environments. As a key member of this team, you will lead and mentor a group of talented engineers, fostering a culture of collaboration and innovation.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.