Key leadership position as manager of managers for Analog Mixed Signal Serdes Layout development group working in proximity with design teams .
Role responsibilities include
- Develop & Maintain high quality IPs/AMS Blocks & Macros
- Drive Area estimates , floorplanning , power planning , physical verification , EMIR , ESD & Latchup and come up with methodologies for productivity and quality improvements
- Mentor mid level talent and managers
- Work with Senior leadership on developing and influencing roadmaps and pre/post sales customer technical engagements

Qualifications

17 - 25 yrs solid Analog Layout experience in customer projects across various bulk and finfet process technologies .
At least 10 yrs hands-on and 5 yrs technical management exposure in related domain .
Btech or Mtech in Electrical/Electronics or related field of study .
Upto date understanding and expertise in analog layout concepts and issues .
Experience in handling blocks , macros & IPs with timely execution and quality targets met .
Exposure to advanced finfet nodes of 2/3/4/5nm is desirable
Experience in advanced usage of Synopsys CC or Cadence Virtuoso , Calibre or ICV verifications , EMIR & PERC tools .
Skill/TCL scripting experience is desirable .

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.