Staff Engineer, Test Chip & Logic Library Solutions, Bangalore, Synopsys
Synopsys seeks a highly skilled and motivated Logic Libraries Silicon Testchip Engineer to join our cutting-edge team. In this role, you will be responsible for developing, validating, and characterizing logic libraries using silicon test chips. You will work closely with cross-functional teams, including design, verification, process technology, and software development, to ensure the high quality of our logic libraries.

Key Responsibilities

1. **Testchip Development and Validation:** - Design, develop, and implement test chip methodologies for characterizing standard cell libraries and custom logic IPs. - Collaborate with design and verification teams to define test strategies, coverage plans, and validation protocols for logic libraries on silicon test chips. - Perform pre-silicon simulations and post-silicon validation to ensure functional accuracy and robustness of the logic libraries.
2. **Characterization and Analysis:** - Closely reviewing silicon characterization, approving data collection, and analysis to extract key metrics such as timing, power, area, and yield for logic libraries. - Develop and maintain automated test benches, scripts, and tools for efficient data analysis and validation workflows. - Debug silicon failures, identify root causes, and implement corrective actions to improve library quality.
3. **Collaboration and Communication:** - Work closely with foundry partners teams to align library design with technology node specifications and to fix yield/performance wherever required - Communicate test results, findings, and improvement recommendations to internal stakeholders and cross-functional teams. - Provide technical support to internal teams and external customers regarding library usage, test chip issues, and debug processes.
4. **Innovation and Continuous Improvement:** - Stay up-to-date with the latest industry trends, tools, and methodologies in logic library development and silicon validation. - Contribute to the enhancement of internal processes and development flows for increased productivity and efficiency. - Explore and implement new techniques for faster and more accurate test chip validation.
5. **Qualifications:** - Bachelor's or Master's degree in Electronics Engineering, or a related field. 5+ years of experience in silicon validation, logic library characterization, or related areas. - Strong understanding of standard cell libraries, custom logic IPs, and their role in SoC (System-on-Chip) design. - Experience with silicon test chip design, layout, and fabrication processes. - Proficiency in using EDA tools such as Cadence, Synopsys, and Mentor for design, verification, and analysis. - Hands-on experience with scripting languages (Python, Perl, TCL, etc.) and automation frameworks for test data analysis. - Strong problem-solving skills and the ability to debug complex issues in silicon validation and characterization. - Excellent communication and teamwork skills, with the ability to collaborate effectively with cross-functional teams.
6. **Preferred Skills:** - Knowledge of process technology, PDKs (Process Design Kits), simulations, circuits design, logic libraries, and post-silicon debugging. Familiarity with techniques for silicon data analysis and library optimization. - Experience with customer support, documentation, spec gathering, planning, and scheduling timelines for delivery processes.