Lead Product Engineer - Verification Methodology & AI/ GenAI
Synopsys
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a motivated and innovative engineer with a passion for formal verification and a keen eye for detail. You thrive in a collaborative environment, working closely with customers and internal teams to deliver high-quality solutions. Your strong technical background in RTL design or verification and scripting/programming languages (like TCL/Python/Perl) enables you to develop and implement efficient verification methodologies. You are adept at understanding customer requirements and translating them into actionable solutions, showcasing excellent problem-solving skills and a proactive approach to overcoming challenges. Your strong oral and written communication skills ensure you can effectively convey complex technical concepts to diverse audiences. You are autonomous, taking ownership of projects and driving them to successful completion while continuously seeking opportunities to enhance your knowledge and skills.
What You’ll Be Doing:
- Promoting the adoption of Synopsys VSO.ai and other AI/GenAI powered products to new customers through presentations and demos.
- Collaborating with customers to understand their flow requirements and mapping them to solutions available within Synopsys VSO.ai.
- Working closely with R&D and Product Marketing to develop new flows and functionalities.
- Defining functional verification flows and methodologies to improve customer productivity.
- Developing custom scripts, creating workarounds, and providing quick solutions while features are being enhanced.
- Owning the customer relationship, ensuring customer requirements are well understood and tracking the development of features required by the customer.
The Impact You Will Have:
- Driving the successful adoption of Synopsys VSO.ai and other AI/GenAI powered products among new customers.
- Enhancing customer satisfaction by delivering tailored solutions that meet their specific verification needs.
- Contributing to the development of innovative verification methodologies that set industry standards.
- Facilitating seamless communication between customers and internal teams to ensure timely and effective resolution of issues.
- Improving overall customer productivity and project timelines through efficient verification flows.
- Playing a key role in the continuous improvement and evolution of Synopsys VSO.ai and AI/GenAI powered solutions.
What You’ll Need:
- BSEE or MSEE degree with 5+ years of industry experience.
- Experience in RTL design or verification engineers involved in deploying verification methodology using simulation-based technologies.
- Exposure to constrained random and coverage driven verification is required
- Experience with coverage closure and running simulation-based regressions at different project stages is desirable but not mandatory.
- Strong understanding of hardware design (Verilog/VHDL/SystemVerilog) and UVM verification methodology
- Programming Python (and / or C/C++/Perl) at a moderate level
Who You Are:
- Great oral and written communication skills.
- Ability to work autonomously.
- Expertise in one or more of scripting/programming languages like TCL/Python/Perl/C/C++.
- Some ML/GenAI conceptual knowledge
- Intuitive sense of a good user interface (UI)
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.