Staff Design Verification Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a motivated and innovative engineer with a strong background in design verification for IPs and subsystems. You have over 5 years of industry experience and a passion for building best-in-class verification methodologies and flows. Your expertise in RTL design verification for ASICs, SoC, or IPs, combined with your proficiency in HDL languages such as Verilog/System Verilog and VHDL, sets you apart. You thrive in a collaborative environment, working seamlessly with cross-functional teams to deploy the latest verification tool capabilities. Your problem-solving skills and ability to identify inefficiencies in the verification process make you an invaluable asset. You are eager to contribute to the development of high-performance silicon chips that power the innovations of tomorrow.

What You’ll Be Doing:

• Build best-in-class verification methodologies and flows for high-performance IPs.
• Identify inefficiencies and improvement opportunities in the front-end verification process and implement ideas to address them.
• Deploy the latest verification tool capabilities for IP verification.
• Work with cross-functional teams comprising of IP design teams and the VCS and Verdi RnD/PE teams.
• Coordinate across multiple global design and tools teams.
• Contribute to the development and optimization of verification methodologies and tools.

The Impact You Will Have:

• Enhancing the efficiency and effectiveness of the verification process for high-performance IPs.
• Ensuring the deployment of cutting-edge verification tools and methodologies.
• Collaborating with global teams to achieve seamless integration and coordination.
• Driving innovation and continuous improvement in verification practices.
• Supporting the development of advanced silicon chips that power next-generation technologies.
• Contributing to Synopsys' reputation as a leader in chip design and verification.

What You’ll Need:

• Industry experience in RTL design verification for ASICs, SoC, or IPs.
• Experience in deploying verification methodology using simulation-based technologies.
• Proficiency in design verification technologies like UVM, simulation, formal, coverage collection, test planning, debugging, integration flows, build/release flows.
• Experience in HDL languages such as Verilog/System Verilog, VHDL and scripting languages such as Python/Perl/TCL.
• Experience in Electronic Design Automation (EDA) verification tools like VCS, Verdi, Spyglass, VC-Formal.
• Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science.
• 5+ years of relevant experience.

Who You Are:

• A collaborative team player with excellent communication skills.
• Detail-oriented with strong analytical and problem-solving abilities.
• Adaptable and open to learning new technologies and methodologies.
• Proactive in identifying improvement opportunities and implementing solutions.
• Passionate about innovation and continuous improvement.

The Team You’ll Be A Part Of:

You will be part of a dynamic and innovative team focused on design verification for high-performance IPs. Our team collaborates closely with IP design teams and the VCS and Verdi RnD/PE teams, working together to deploy the latest verification tool capabilities. We pride ourselves on our ability to identify inefficiencies and implement improvements, driving continuous innovation in the verification process. Join us and contribute to the development of silicon chips that power the future.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.