Principal R&D Engineer

Job Description and Requirements

We are looking for an exceptional C++ developer with background in or interest to learn about Custom Design and Layout in the field of Integrated Circuits. In this role, you would be responsible for designing, developing, and debugging software programs for analog and mixed-signal implementation.

Responsibilities

• Design new solutions to high value problems in Custom Design and Layout areas for which solutions do not exist or are underserved today (e.g. new layout methodologies, applications of analytics and machine learning in layout etc.).
• Collaborate on flagship layout automation pieces built and maintained by the local peers
• Improve existing system and provide solutions in Synopsys Custom products
• Work with corporate application engineers to understand customers’ need and to provide solutions
• Write well-designed, well-tested, high quality C++ programs
• Write design specifications, review code for peer members

Requirements

• Bachelors or Masters Degree in Computer Science or Electrical Engineering
• 12+ years of Experience in the following:
  • Software development: C++ , TCL, Python, Linux, build and revision control systems, spec writing/reviewing
  • Software design: data structures, algorithms, GUI and Interactive systems, event-driven systems

Desired skills

• Would be best to have background of Layout Editor and its automation engines for Analog Design
• Digital EDA tool and flows
• Circuit analysis, layout principles, semi-conductor manufacturing
• Advanced math, statistics, and machine learning technique
• Strong communication skills to work in multi geography, multi-cultural team

Our Custom Design & Manufacturing business is about building software solutions (tools, flows) for custom design, analog and mixed signal design. The custom product is used by our IP team extensively for all their products. We work closely with our signoff extraction, verification, and simulation teams to build differentiated solutions for designing and verifying advanced silicon analog and mixed-signal designs. We design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.