Junior Functional Silicon Validation Engineer
NXP Semiconductors
Posted on Jul 10, 2025
We are looking for a Junior Functional Validation engineer at NXP Sophia Antipolis:
Responsibilities
- Responsible for complete functional validation of SOC post silicon
- Interface to software, architecture, design teams, end user to understand functionality and application
- Define the validation strategy for the design as a function of its architecture, the expected use cases, the technology the limitations of the tools and the schedule constraints
- Develop, debug, and modify test environments and test cases for different platforms (Emulator, FPGA, silicon)
- Code testcases in an appropriate language and debug these test cases on the design models (FPGA, Emulation platform) and on silicon
- Work with design and software teams to debug and correct issues or identify workaround. Add additional testcases to verify corrections or workarounds
- Determine the quality of the validation by defining coverage goals and methods for measuring these goals. Enhance the testcases until the goals are met
- Perform pre-certification tests as required for standard interfaces
Profile
- Knowledge of the architecture, elements and functionality of processor based SOCs, including CPUs, DMA, MMU, PLLS, memory and peripheral interfaces
- Knowledge of product and IC/IP design processes
- Understanding of software development process for embedded CPUs and experience in developing and debugging software
- Proficient in the languages used for testcase development (C, VHDL, Verilog, …)
- Experience with debug on designs pre and post-silicon, in simulation (FPGA or Emulation) and on bench
Personal Traits
- Flexible and adaptable with an ability to verify and debug at many levels and on many different platforms
- Rigorous and methodical with good analytical skills
- Pays attention to details, tenacity in tracing and finding problems
- Ability to question and identify weaknesses in written specifications
- Good team player with ability to work across teams and sites
- Skills in other areas of IC design flow (RTL design, synthesis, DFT, place and route …) are an advantage