Discover Technata Job board

Find your next tech job in Kanata North, Canada’s largest technology park. Then explore endless international opportunities and dream about where your career will take you. With the Country’s largest density of technology companies ranging from promising startups to leading global giants, Kanata North is the place to be if you are serious about a career in tech.

Lead design engineer

NXP Semiconductors

NXP Semiconductors

Noida, Uttar Pradesh, India
Posted on Monday, February 12, 2024

NXP Semiconductors N.V. (NASDAQ: NXPI) enables secure connections for a smarter world, advancing solutions that make lives easier, better, and safer. As the world leader in secure connectivity solutions for embedded applications, NXP is driving innovation in the automotive, industrial & IoT, mobile, and communication infrastructure markets. Built on more than 60 years of combined experience and expertise, the company has approximately 29,000 employees in more than 30 countries and posted revenue of $8.61 billion in 2020.

Physical Design - STA Engineer

We are looking for an Experienced STA Engineer. This is a unique opportunity for bringing timing & convergence for SOC, driving the design changes, while being responsible for end2end timing closure and timing signoff. It includes the ownership for driving timing signoff criteria, design clocking, constraints development and validation. Expected Interface with critical domains like IP, Functional Integration, DFT & Verification while working closely with Physical implementation team for providing feedback, timing convergence and ECO creation, timing/noise model build, GLS support and final timing signoff.


• Ability to understand advanced digital design architectures and clocking structures to help manage Functional/Scan/MBIST timing constraints with multiple clocks.

• Expertise in I/O constraints developments.

• May have to own bottom-up partition-level integration and top-down design partitions


• Expertise in Advance Timing Analysis, Debug and timing convergence, ECO creation with signal

integrity & EM/IR.

• Knowledge about SDF, GLS, and able to debug timing failures.

• Hands-on experience of working on technology nodes like 28nm, 16nm, 10nm, 7nm.

• Good knowledge of EDA tools from RC, DC, PT, PTSI.

• Good knowledge of Synthesis, Floor planning, place & route, power and clock distribution, pin

placement and timing analysis.

• Contribution in flow/methodology related scripting as part of design implementation.

Years of experience - 5+ years

More information about NXP in India...