ASIC PD Coop
Nokia
At Nokia of America, we're seeking a talented and motivated ASIC PD Coop to join our NI ON Comp R&D ASICs & Architecture 4B department. In this role, you'll be an integral part of our Physical Design sub-group, supporting various tasks that contribute to the successful tape-out of Nokia's ASICs. Your work will focus on applying data mining and analytics techniques to extract valuable insights from PPA metrics and physical design workflows, helping us optimize our designs and stay at the forefront of technology.
Number of Positions: 1
Duration: 4-8 months
Dates: May - August - December 2026
Location: Hybrid in San Jose, CA
EDUCATIONAL RECOMMENDATIONS:
Currently a candidate pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field with an accredited university in the USA.
Nokia is a global leader in connectivity for the AI era. With expertise across fixed, mobile and transport networks, powered by the innovation of Nokia Bell Labs, we’re advancing connectivity to secure a brighter world.
- Flexible and hybrid working schemes to balance study, work, and life
- Professional development events and networking opportunities
- Well-being programs, including Personal Support Service 24/7 - a confidential support channel open to all Nokia employees and their families in challenging situations
- Opportunities to join Nokia Employee Resource Groups (NERGs) and build connections across the organization
- Employee Growth Solutions, mentorship programs, and coaching support for your career development
- A learning environment that fosters both personal growth and professional development – for your role and beyond
Join Nokia of America as an ASIC PD Coop and be part of our innovative R&D team! You'll work with the Physical Design sub-group, applying data analytics and automation to optimize our ASICs' performance and efficiency. It's an exciting opportunity to contribute to cutting-edge technology and gain valuable industry experience.
- Strong academic background with a passion for data analytics and automation.
- Experience with data mining and visualization tools is preferred.
- Familiarity with ASIC design and physical design workflows is an asset.
- Excellent problem-solving and analytical skills, with a keen eye for detail.
- Strong communication and collaboration skills, able to work effectively in a team environment.
- Ability to work independently and manage multiple tasks simultaneously.
- Proficiency in programming languages such as Python or C++ is advantageous.
- Knowledge of EDA tools and design methodologies is a plus.
- A self-starter with a proactive approach to learning and adapting to new technologies.
- Apply data mining and analytics techniques to extract insights from PPA metrics and physical design workflows.
- Develop and maintain PPA dashboards to visualize trends and identify optimization opportunities.
- Automate data collection and analysis processes for internal Place-and-Route (PnR) trials, ensuring efficiency and accuracy.
- Perform power estimation and analysis using data-driven approaches, contributing to efficient design implementation.
- Conduct timing analysis using Static Timing Analysis (STA) tools and correlate results with PPA data for comprehensive design evaluation.
- Collaborate with cross-functional teams, providing support for physical design activities and troubleshooting issues.
- Stay updated with the latest industry trends and technologies, ensuring our designs remain competitive and innovative.
- Document and communicate your findings and recommendations effectively, ensuring a smooth workflow within the team.