The team you'll be part of

Nokia Bell Labs is the world-renowned research arm of Nokia, having invented many of the foundational technologies that underpin information and communications networks and all digital devices and systems. This research has produced nine Nobel Prizes, five Turing Awards and numerous other awards.

As Nokia's growth engine, we create value for communication service providers and enterprise customers by leading the transition to cloud-native software and as-a-service delivery models. Our inclusive team of dreamers, doers, and disruptors push the limits from impossible to possible.

You will join the team of Hardware platforms research group in Nokia Bell Labs in Antwerp, working in close collaboration with the digital & analog ASIC experts and providing added value to the realization of strategic digital hardware building blocks for communication systems.

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We are looking for an Intern interested on the hardware implementation of complex digital signal processing and/or AI/ML algorithms.

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You are:

• An enrolled Master student or PhD candidate in Electrical Engineering or related area.

• Proficient with HDL languages such as Verilog, Systemverilog or VHDL.

• Proficient with hardware (FPGA) design, simulation and related tools such as Vivado, QuestaSim, Synopsys VCS or others.

• Familiar with MATLAB.

• Available for a duration of minimum 6 weeks.

• Fluent in English.

• A positive and open mindset and strong drive to succeed

It would be nice if you also had:

• An affinity for or experience with telecommunication technologies or AI/ML.

• Experience in working with experimental lab setups & high-end test equipment.
• Demonstrated early research results through journal papers or other industry recognition.

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This internship seeks a highly motivated student to jointly develop and design an RTL implementation of state-of-the-art DSP and or AI/ML algorithms. These algorithms can be used in next-generation mobile or optical communication systems.

As part of our team, you will:

• Develop and design an RTL implementation on FPGA or ASIC of several state-of-the-art signal processing algorithms and perform transistor-level simulations.
• Validate the implementation and compare with state-of-the-art solutions in terms of performance and power consumption.
• Propose out-of-the-box solutions which have a high-performance impact.
• Document and present the developed system and results to a wider Bell Labs audience