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Job Description:

Leadership Opportunity: Engineering Manager, Design, Verification, Implementation - Chandler, AZ

The FPGA Business Unit at Microchip Technology is seeking an experienced Engineering Manager to lead our high-performance Design, Verification, and Implementation teams in Chandler, Arizona. This critical leadership role will drive the execution and successful delivery of our next-generation, highly-secure, and low-power FPGA device products.

Success in this role hinges on your ability to cultivate an environment of continuous improvement and foster exceptional team collaboration. You will be directly responsible for managing to key engineering metrics, implementing methodologies that track efficiency, quality, and cycle time for silicon development. This rigorous focus is essential for driving industry-leading engineering outcomes, and ensuring our teams deliver cutting-edge FPGA technology, including complex features like sophisticated security IP, PCIE, DDR, MIPI, and advanced processor integration. Your leadership will be the catalyst for operational excellence, pushing the boundaries of what is achievable in silicon development.

Core Responsibilities

• Lead microarchitectural specification, design, verification, and Implementation/Timing Closure for SoC and FPGA platforms targeting low-power applications (e.g., edge AI, embedded vision, industrial IoT, aerospace).
• Oversee RTL design integration and builds, functional verification, and implementation/APR/Timing closure to ensure first silicon success and industry-leading cycle times.
• Effectively collaborate with cross-functional teams including architecture, software, analog, implementation and post-silicon validation to ensure design completeness and performance.
• Drive industry-leading methodology improvements and mentor junior engineers.
• Interface with IP vendors and internal stakeholders to align on technical requirements and roadmap.
• Manage design trade-offs, risk assessments, and schedule adherence for tape-out readiness.
• Drive team building, skill improvement and performance management.
• Contribute to cross-geo cooperation and positive work environment.
• About 20% domestic/international travel can be expected.

Requirements/Qualifications:

Required Expertise

• Deep hands-on experience in:
  • RTL Design (Verilog/SystemVerilog) methodologies and infrastructure
  • Functional Verification (UVM, assertions, coverage) methodologies and infrastructure
  • SoC Integration and Static Timing Analysis methodologies
• Proven track record of successful tape-outs across multiple domains.
• Familiarity with industry leading EDA tools and flows.
• Strong understanding of SOC Development cycles with focus on quality, performance metrics, and progress tracking.
• Desirable - FPGA prototyping and Emulation

Qualifications

• BS or MS in Electrical Engineering or related field.
• Minimum 15 years of relevant experience in ASIC/FPGA design and verification.
• Demonstrated leadership in technical teams and cross-site collaboration.

Preferred Skills

• Exposure to FPGA design /development flows.
• Experience with DDR, PCIe, Cryptography, MIPI, Ethernet MAC integration.

Travel Time:

0% - 25%

Physical Attributes:

Hearing, Seeing, Talking, Works Alone, Works Around Others

Physical Requirements:

10% standing, 10% walking. 80% sitting, 100% in doors; Usual business hours

Microchip Technology Inc is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected Veteran status, age, or any other characteristic protected by law.

For more information on applicable equal employment regulations, please refer to the Know Your Rights: Workplace Discrimination is Illegal Poster.

To all recruitment agencies: Microchip Technology Inc. does not accept unsolicited agency resumes. Please do not forward resumes to our recruiting team or other Microchip employees. Microchip is not responsible for any fees related to unsolicited resumes.