Principal Engineer - Digital Verification
Microchip Technology
This job is no longer accepting applications
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Job Description:
The primary objective of this role is to create and use verification environments to verify digital based products and contribute to the verification methodology development and project execution resulting in new and/or improved products.
The successful candidate will be responsible for the entire verification flow of the product to be tested, from verification architecture conceptual plan to release of the product into silicon and into production.
Main Responsibilities
Define products test plans
Define and implement UVM and System Verilog based verification frameworks
Code UVM components, tests and sequences
Define and implement functional coverage
Perform verification of digital and mixed-signal products: run RTL and gate level simulations; analyze and debug simulation results and interact with the design team; run RTL and gate level regressions for product stream out
Support validation of silicon
Requirements/Qualifications:
Mandatory Skills
Proficiency in System Verilog
Proficiency in UVM methodology
Extensive experience in building digital verification frameworks from scratch, using UVM
methodology
Proficiency in System Verilog Assertions
Must be able and willing to investigate in detail the designed product and develop a tailored and comprehensive verification bench
Must have good problem-solving skills
Must have good communication skills and ability to work effectively in a team
Must be self-motivated to produce best quality results
Preferred Skills
Knowledge of scripting languages (Python, Perl, Tcl, …)
Experience with NVM memory products, highly preferable
Experience with mixed signal products
Education
Bachelor’s degree or higher
Experience
Minimum 8 years’ experience in UVM verification
Travel Time:
0% - 25%This job is no longer accepting applications
See open jobs at Microchip Technology.See open jobs similar to "Principal Engineer - Digital Verification" Discover Technata.