About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ need. Our Group predominantly work for NVMe and PCIe domain.

What You Can Expect

In this role, you will develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers and contribute to the methodology behind such development.
Activities may include:

• Writing a verification test plan using random techniques and coverage analysis and working with designers to ensure it is complete.

• Developing tests and tuning the environment to achieve coverage goals. Debugging failures and working with designers to resolve issues.

• Experience in block/IP/Sub-system level, verification of SoC IPs / Peripherals is a must

• Knowledgeable of ARM architecture and AMBA bus standards like AXI-4.

• Experience with industry standard interfaces such as PCIE (preferably Gen6/7), NVMe 2.0.

• Experience in coding UVM SOC/Subsys level testbenches, BFM, scoreboards, monitors, etc.

• Proficient in writing and debugging tests in UVM as well as C.

• Should take responsibility of Mentoring juniors.

What We're Looking For

• BE/Btech/MTech Computer Engineering, Electrical Engineering, or Computer Science with 8-16 years of verification experience.

• Experience with System Verilog, UVM.
• Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
• Experience with scripting language such as Python or Perl and EDA Verification tools.
• Experience with Object-Oriented Design and implementation.
• Good understanding of Linux O.S.
• Good programming skills desired, especially C++ and ARM assembly.
• Understanding of networking protocols, a plus.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Interview Integrity

To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.

These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

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