About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

The Custom Silicon team in Marvell designs and develops complex, high-speed, high-performance custom chips for external customers in market segments ranging from artificial intelligence and machine learning to wired and wireless infrastructure. The Design-for-Test (DFT) team is a global team that impacts chip design from inception all the way to manufacturing production. Rigorous DFT methods ensure that a part can be tested with an extremely high degree of defect coverage in a time-constrained manufacturing environment, directly impacting product quality and customer satisfaction.
The ideal candidate will possess both digital logic design and verification skills along with software development and programming skills. Such a candidate will enjoy an opportunity that spans disciplines and involves them in all aspects of semiconductor chip design.

What You Can Expect

• Develop understanding of both the block level and chip top design-for-test (DFT) and automated test pattern generation (ATPG) flows for complex custom silicon designs
• Execute DFT insertion and verification flows for scan test, Memory Built-in Self-Test (MBIST), and IP macro test
• Execute digital logic, MBIST, and IP test pattern generation and simulation flows
• Analyze results and look for ways to improve test coverage
• Collaborate with the global DFT team on design flow improvements

What We're Looking For

• Bachelor of Science degree in Computer or Electrical Engineering and at least 1-3 years of related professional experience, or Master of Science degree in Computer or Electrical Engineering
• Digital logic design skills with Verilog
• Knowledge of scan-based logic test, memory BIST/BISR, functional test, JTAG, and other test methodologies is preferred
• Demonstrable programming skills with TCL, Python, Perl, or csh/bash in Unix type environment, with good problem-solving skills
• Experience with EDA DFT tools (Siemens EDA Tessent, Cadence Modus, or Synopsys TestMAX) is helpful
• Good understanding of Linux/Unix, with experience working on distributed systems
• Effective teamwork and communication skills

Expected Base Pay Range (USD)

90,400 - 133,760, $ per annum

The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.

Additional Compensation and Benefit Elements

At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps@marvell.com.

Interview Integrity

As part of our commitment to fair and authentic hiring practices, we ask that candidates do not use AI tools (e.g., transcription apps, real-time answer generators like ChatGPT, CoPilot, or note-taking bots) during interviews.

Our interviews are designed to assess your personal experience, thought process, and communication skills in real-time. If a candidate uses such tools during an interview, they will be disqualified from the hiring process.

This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.

#LI-LM1