Discover Technata Job board

Find your next tech job in Kanata North, Canada’s largest technology park. Then explore endless international opportunities and dream about where your career will take you. With the Country’s largest density of technology companies ranging from promising startups to leading global giants, Kanata North is the place to be if you are serious about a career in tech.

Design Verification, Senior Manager

Marvell

Marvell

Design
Ho Chi Minh City, Vietnam
Posted on Tuesday, July 9, 2024

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M® product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform.

As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company, etc.

What You Can Expect

ASIC design verification engineer responsible for the verification and evaluation of digital circuits in high-speed data communication ICs.
The candidate will be involved in verification plan development, test environment setup, modeling, testcase development and execution.
He/She will be responsible for block and /or chip level verification and verification of CPU, DDR, PCIE functions using UVM methodology, System Verilog.

What We're Looking For

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 8-14 years of related professional experience.
  • Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with -10 years of experience.
  • Strong knowledge of UVM/OVM/VMM.
  • Write a verification test plan using random techniques and coverage analysis, and work with designers to ensure it is complete.
  • Develop tests and tune the environment to achieve coverage goals.
  • Debug failures and work with designers to resolve issues.
  • Strong ability of scripting languages such as Perl, Python, Makefile, C Shell.\
  • Good personal communication skills and team working spirit. Hardworking and motivated to be part of a highly competent team.

Preferred/Plus:

  • Hands-on knowledge of ARM processor-based subsystem verification.
  • Working knowledge of C/C++ and ARM Assembly programming.
  • Experience with Gate Level Simulations.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.