As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

The Wavelogic family of products is widely used in Ciena's optical fiber transmission solutions and is one of the main contributors to Ciena's success in the telecommunications industry. To further strengthen our team, we are looking for a hardworking digital verification engineer who will be involved in the verification of these products, working within a team of digital design engineers, verification engineers and architects.

Your role as a digital verification engineer will be required to propose and implement innovative verification strategies, in order to thoroughly simulate and verify functional blocks and subsystems for the Wavelogic family of products.

• You will work collaboratively with experts in the field to verify complex blocks.
• You will contribute to verification planning, functional coverage.
• You will contribute to the creation or integration of the test bench environment(s) and/or components, agents, scoreboard, and all test scenarios related to your architectural functional block using System Verilog UVM.

The Must Haves:

• Electrical or computer engineering, computer science or other applicable completed scientific degree at the BEng/BSc, MEng/MSc or higher level
• A highly motivated self-starter, able to work independently, while being a great teammate
• Ability to methodically address sophisticated technical problems.
• Excellent organization, written and oral (English) interpersonal skills.

Assets:

• Previous ASIC design/verification from co-op or internship
• Knowledge of System Verilog, UVM, SVA, and simulators from major vendors
• Experience with using GIT for source code management and revision tracking
• Experience with using Jira for schedule planning, assignment tracking and bug reporting
• Familiarity with programming languages such as Python, Make, bash, object-oriented programming, C, C++, System C

Pay Range:

The annual pay range for this position is $70,700 - $112,900

Pay ranges at Ciena are designed to accommodate variations in knowledge, skills, experience, market conditions, and locations, reflecting our diverse products, industries, and lines of business. Please note that the pay range information provided in this posting pertains specifically to the primary location, which is the top location listed in case multiple locations are available.

Non-Sales employees may be eligible for a discretionary incentive bonus, while Sales employees may be eligible for a sales commission. In addition to competitive compensation, Ciena offers a comprehensive benefits package, including medical, dental, and vision plans, participation in 401(K) (USA) & DCPP (Canada) with company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company-paid holidays, paid sick leave, and vacation time. We also comply with all applicable laws regarding Paid Family Leave and other leaves of absence.

At Ciena, we are committed to building and fostering an environment in which our employees feel respected, valued, and heard. Ciena values the diversity of its workforce and respects its employees as individuals. We do not tolerate any form of discrimination.

Ciena is an Equal Opportunity Employer, including disability and protected veteran status.

If contacted in relation to a job opportunity, please advise Ciena of any accommodation measures you may require.