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AMD does not require or seek to collect a fee or payment from candidates in the application or interview process. We do not conduct interviews by text messaging. Nor does AMD require copies of IDs, passports, or other identification as a part of the interview process. If you have experienced these requests, this is a scam, and you may wish to consider making a report to ReportFraud.ftc.gov or IC3.gov. We encourage job seekers interested in AMD roles to apply on the amd.com Careers page.
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For AMD employees looking to refer someone or search for new opportunities, please use the Internal Career Site.
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
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AMD together we advance_
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ROLE:
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This person will be part of next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.
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KEY RESPONSIBILITIES:
\n
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Strong knowledge in IP/SOC design methodologies.
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Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog
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Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows
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ow power design
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Mentoring juniors and enhancing their skill set
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Must have strong knowledge of AMBA AHB/AXI protocol
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Working knowledge on code coverage, functional coverage, Lint, CDC etc
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IP development and coding using standard coding guide lines knowledge
\n
Excellent communication skills. Must be able to participate & lead in global meetings
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Soft skills to be able to work in a cross functional international team digital and software design engineers
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PREFERRED EXPERIENCE:
\n
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Minimum 7+ years of RTL design, Architecture, SOC implementation experience
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Ability to work well in a dynamic, fast-paced, pressure filled environment.
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ACADEMIC CREDENTIALS:
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B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
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<!-- FOR BRANDING SPECIFIC TRACKING SCRIPTS -->\n\n\n\n\n <footer class="footer defaults">\n
<script> window.jobDescriptionConfig = {"socialShare":true,"job":{"slug":"37138","category":[" Engineering"],"full_location":"Bangalore, India","short_location":"Bangalore, India","language":"en-us","languages":["en-us"],"client_code":"amd","req_id":"37138","title":"RTL Design / Architecture Engineer","description":"<strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">WHAT YOU DO AT AMD CHANGES EVERYTHING</span></strong></p>\\r\\n<p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. </span></p>\\r\\n<p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD together we advance_</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"> </p><p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"><span style=\\"font-size: 12pt;\\"><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-contrast=\\"auto\\"><span style=\\"margin: 0px; padding: 0px;\\" data-ccp-charstyle=\\"eop\\"> </span></span><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-ccp-props=\\"{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}\\"> </span></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>ROLE:</strong></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">This person will be part of next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.</span></p><p style=\\"margin-bottom: 0in;\\"> </p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> <strong>KEY RESPONSIBILITIES:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong knowledge in IP/SOC design methodologies. </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">ow power design</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Mentoring juniors and enhancing their skill set</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Must have strong knowledge of AMBA AHB/AXI protocol </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Working knowledge on code coverage, functional coverage, Lint, CDC etc</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">IP development and coding using standard coding guide lines knowledge</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Excellent communication skills. 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Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. 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Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.</span></p><p style=\\"margin-bottom: 0in;\\"> </p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> <strong>KEY RESPONSIBILITIES:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong knowledge in IP/SOC design methodologies. </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">ow power design</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Mentoring juniors and enhancing their skill set</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Must have strong knowledge of AMBA AHB/AXI protocol </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Working knowledge on code coverage, functional coverage, Lint, CDC etc</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">IP development and coding using standard coding guide lines knowledge</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Excellent communication skills. Must be able to participate & lead in global meetings</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Soft skills to be able to work in a cross functional international team digital and software design engineers</span></li></ul><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> </span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>PREFERRED EXPERIENCE:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Minimum 7+ years of RTL design, Architecture, SOC implementation experience</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Ability to work well in a dynamic, fast-paced, pressure filled environment.</span></li></ul><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> </span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>ACADEMIC CREDENTIALS:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.</span></li></ul><p> </p><p><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">#LI-SK2</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","qualifications":"<p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","responsibilities":"<p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"> </p><p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"><span style=\\"font-size: 12pt;\\"><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-contrast=\\"auto\\"><span style=\\"margin: 0px; padding: 0px;\\" data-ccp-charstyle=\\"eop\\"> </span></span><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-ccp-props=\\"{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}\\"> </span></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>ROLE:</strong></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">This person will be part of next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.</span></p><p style=\\"margin-bottom: 0in;\\"> </p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> <strong>KEY RESPONSIBILITIES:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong knowledge in IP/SOC design methodologies. </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">ow power design</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Mentoring juniors and enhancing their skill set</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Must have strong knowledge of AMBA AHB/AXI protocol </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Working knowledge on code coverage, functional coverage, Lint, CDC etc</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">IP development and coding using standard coding guide lines knowledge</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Excellent communication skills. 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Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. </span></p>\\r\\n<p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD together we advance_</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"> </p><p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"><span style=\\"font-size: 12pt;\\"><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-contrast=\\"auto\\"><span style=\\"margin: 0px; padding: 0px;\\" data-ccp-charstyle=\\"eop\\"> </span></span><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-ccp-props=\\"{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}\\"> </span></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>ROLE:</strong></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">This person will be part of next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.</span></p><p style=\\"margin-bottom: 0in;\\"> </p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> <strong>KEY RESPONSIBILITIES:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong knowledge in IP/SOC design methodologies. </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">ow power design</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Mentoring juniors and enhancing their skill set</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Must have strong knowledge of AMBA AHB/AXI protocol </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Working knowledge on code coverage, functional coverage, Lint, CDC etc</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">IP development and coding using standard coding guide lines knowledge</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Excellent communication skills. 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AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","location_name":"IN,Bangalore","street_address":"#102-103, Export Promotion Industrial Park","city":"Bangalore","state":"Karnataka","country":"India","country_code":"IN","postal_code":"560066","location_type":"LAT_LNG","latitude":12.9716,"longitude":77.7473,"additional_locations":[],"categories":[{"name":"Engineering"}],"tags1":["No"],"tags2":["INR ₹2,772,000.00/Yr."],"tags3":["INR ₹3,960,000.00/Yr."],"tags4":["Global Careers (External)"],"department":"","benefits":[],"employment_type":"FULL_TIME","qualifications":"<p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. 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We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. </span></p>\\r\\n<p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD together we advance_</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"> </p><p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"><span style=\\"font-size: 12pt;\\"><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-contrast=\\"auto\\"><span style=\\"margin: 0px; padding: 0px;\\" data-ccp-charstyle=\\"eop\\"> </span></span><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-ccp-props=\\"{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}\\"> </span></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>ROLE:</strong></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">This person will be part of next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.</span></p><p style=\\"margin-bottom: 0in;\\"> </p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> <strong>KEY RESPONSIBILITIES:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong knowledge in IP/SOC design methodologies. </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">ow power design</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Mentoring juniors and enhancing their skill set</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Must have strong knowledge of AMBA AHB/AXI protocol </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Working knowledge on code coverage, functional coverage, Lint, CDC etc</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">IP development and coding using standard coding guide lines knowledge</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Excellent communication skills. Must be able to participate & lead in global meetings</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Soft skills to be able to work in a cross functional international team digital and software design engineers</span></li></ul><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> </span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>PREFERRED EXPERIENCE:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Minimum 7+ years of RTL design, Architecture, SOC implementation experience</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Ability to work well in a dynamic, fast-paced, pressure filled environment.</span></li></ul><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> </span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>ACADEMIC CREDENTIALS:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.</span></li></ul><p> </p><p><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">#LI-SK2</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","qualifications":"<p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","responsibilities":"<p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"> </p><p style=\\"margin: 0px; padding: 0px; color: windowtext;\\"><span style=\\"font-size: 12pt;\\"><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-contrast=\\"auto\\"><span style=\\"margin: 0px; padding: 0px;\\" data-ccp-charstyle=\\"eop\\"> </span></span><span style=\\"margin: 0px; padding: 0px; font-family: Arial, Arial_EmbeddedFont, Arial_MSFontService, sans-serif;\\" data-ccp-props=\\"{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}\\"> </span></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong>ROLE:</strong></span></p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">This person will be part of next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.</span></p><p style=\\"margin-bottom: 0in;\\"> </p><p style=\\"margin-bottom: 0in;\\"><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\"> <strong>KEY RESPONSIBILITIES:</strong></span></p><ul><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong knowledge in IP/SOC design methodologies. </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">ow power design</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Mentoring juniors and enhancing their skill set</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Must have strong knowledge of AMBA AHB/AXI protocol </span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Working knowledge on code coverage, functional coverage, Lint, CDC etc</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">IP development and coding using standard coding guide lines knowledge</span></li><li><span style=\\"font-size: 12pt; font-family: arial, helvetica, sans-serif;\\">Excellent communication skills. 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AMD does not require or seek to collect a fee or payment from candidates in the application or interview process. We do not conduct interviews by text messaging. Nor does AMD require copies of IDs, passports, or other identification as a part of the interview process. If you have experienced these requests, this is a scam, and you may wish to consider making a report to ReportFraud.ftc.gov or IC3.gov. We encourage job seekers interested in AMD roles to apply on the amd.com Careers page.
For AMD employees looking to refer someone or search for new opportunities, please use the Internal Career Site.
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
ROLE:
This person will be part of next generation Design team. Requires strong hands-on knowledge of all facets of the SOC design process and good understanding of SOC Architecture.
KEY RESPONSIBILITIES:
Strong knowledge in IP/SOC design methodologies.
Sound knowledge of RTL/SOC design/integration with Verilog/system Verilog
Strong experience in Synthesis, timing, full chip netlist & front-end design tools& flows
ow power design
Mentoring juniors and enhancing their skill set
Must have strong knowledge of AMBA AHB/AXI protocol
Working knowledge on code coverage, functional coverage, Lint, CDC etc
IP development and coding using standard coding guide lines knowledge
Excellent communication skills. Must be able to participate & lead in global meetings
Soft skills to be able to work in a cross functional international team digital and software design engineers
PREFERRED EXPERIENCE:
Minimum 7+ years of RTL design, Architecture, SOC implementation experience
Ability to work well in a dynamic, fast-paced, pressure filled environment.
ACADEMIC CREDENTIALS:
B.E/B.Tech or M.E/M.Tech degree in ECE/ Electrical Engineering with Digital Systems/VLSI as major.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.