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Design Verification Engineer

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  • Bangalore, India
  • Engineering
  • 37139

Job Description



WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




 

  

Role Description:

 

Design Verification Engineering role with Security IP subsystem Team. The primary focus of this role is Hardware/Firmware verification of various embedded micro-processor subsystems and the associated hardware accelerators in leading edge SOC’s.

These IP subsystems provide high performance functions to the respective SoC, such as security policy management, cryptography, data compression, high throughput DMA, etc.

 

Key Responsibilities:

  • Development and verification of embedded firmware for SOC secure boot and embedded microprocessor driven hardware acceleration services for cryptography, decompression and large scale DMA functions.
  • Hardware verification in UVM System Verilog and C-DPI structured testbench.
  • Develop and maintain subsystem verification architecture, testbench, test methodology for
    • Embedded CPU and subcomponent IPs with
    • AXI/AHB busses and HW accelerators such as
    • Cryptography, Data Compression, DMA, etc.
  • Participate in subsystem specification, influence IP micro-architecture development, develop and verify abstracted performance models
    • Create abstracted FW and HW performance models
    • Develop critical target code to collect IP performance key parameters
    • Explore subsystem architecture performance trade-off for FW and HW optimization
  • Develop and execute subsystem and block level test plans
    • Develop FW/HW co-verification methodology
    • Develop UVC and System Response models
    • Develop and debug UVM and C-DPI test cases with integrated FW
    • Improve verification metrics
  • Further develop subsystem and block level testbenches using UVM randomized test methodology and C-DPI directed test methodology.
    • Develop and maintain subsystem level integration scripts
    • Develop and maintain subsystem testbench build and test run scripts
    • Drive to verification metrics closure
  • Interface with SoC integration and SoC DV teams
    • Define and develop IP level DV API to support SoC level DV effort
    • Develop and maintain IP build and delivery infrastructure to support SoC level integration of SecurityIP subsystems. 
    • Support SoC level IP emulation, silicon bring-up and debugging effort

 

Preferred Experience:

  • 7+ years design verification experience
  • Proficient in Verilog, System Verilog, and several scripting languages (Make, Perl, Python, etc.)
  • Excellent knowledge about UVM methodology and C-DPI methodology
  • Excellent knowledge about standard bus/interface protocols (i.e. AXI, AHB, AMBA)
  • Excellent experience with ASIC verification tools, simulation, linting, power aware simulation, etc.
  • Strong analytical/problem solving skills and attention to details
  • Being a motivated team member, and able to independently drive tasks to completion as well
  • Professional interpersonal and communication skills

 

EDUCATION:

 

  • Bachelor’s degree with major in Electronics Engineering, Computer Science, or another relevant subject
  • Master’s Degree preferred.

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Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.