Find your next tech job in Kanata North, Canada’s largest technology park. Then explore endless international opportunities and dream about where your career will take you. With the Country’s largest density of technology companies ranging from promising startups to leading global giants, Kanata North is the place to be if you are serious about a career in tech.
AMD does not require or seek to collect a fee or payment from candidates in the application or interview process. We do not conduct interviews by text messaging. Nor does AMD require copies of IDs, passports, or other identification as a part of the interview process. If you have experienced these requests, this is a scam, and you may wish to consider making a report to ReportFraud.ftc.gov or IC3.gov. We encourage job seekers interested in AMD roles to apply on the amd.com Careers page.
\n\n
For AMD employees looking to refer someone or search for new opportunities, please use the Internal Career Site.
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
\n
AMD together we advance_
THE ROLE: Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.
\n
\n
KEY RESPONSIBILITIES:
\n
\n
Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.
\n
Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.
\n
Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.
\n
Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.
\n
\n
PREFERRED EXPERIENCE:
\n
\n
\nAdvanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM.\n
\n
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)
\n
Familiarity with power aware simulation and firmware/hardware co-verification is a plus.
\n
Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.
\n
Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.
\n
Strong analytical and problem-solving skills with pronounced attention to detail.
\n
Scripting language experience: Perl, Ruby, Makefile, shell is a plus.
\n
Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.
\n
\n
ACADEMIC CREDENTIALS:
\n
Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
\n
\n\n
\n\n
\n
\n\n \n\n \n\n \n \n\n \n
<!-- FOR BRANDING SPECIFIC TRACKING SCRIPTS -->\n\n\n\n\n <footer class="footer defaults">\n
<script> window.jobDescriptionConfig = {"socialShare":true,"job":{"slug":"36617","category":[" Engineering"],"full_location":"Penang, Malaysia","short_location":"Penang, Malaysia","language":"en-us","languages":["en-us"],"client_code":"amd","req_id":"36617","title":"Silicon Design Verification Engineer","description":"<strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">WHAT YOU DO AT AMD CHANGES EVERYTHING</span></strong></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD together we advance_</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">THE ROLE:</span></strong><span style=\\"color: black;\\"><br />Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.</span></span></p><p style=\\"margin: 0px;\\"><span style=\\"color: black; font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"> </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow</span><br /><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Proficient with Verilog, System Verilog and UVM.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with power aware simulation and firmware/hardware co-verification is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Strong analytical and problem-solving skills with pronounced attention to detail.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Scripting language experience: Perl, Ruby, Makefile, shell is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">ACADEMIC CREDENTIALS:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.</span></li></ul><p><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">LOCATION</span></strong></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Penang, Malaysia</span></p><p> </p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-FL1</span></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-Hybrid</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","location_name":"MY,Penang","street_address":"Hotel Equatorial, Jalan Bukit Jambul","city":"Penang","state":"Pulau Pinang","country":"Malaysia","country_code":"MY","postal_code":"11900","location_type":"LAT_LNG","latitude":5.3294,"longitude":100.2907,"additional_locations":[],"categories":[{"name":"Engineering"}],"tags1":["No"],"tags2":["MYR RM72,100.00/Yr."],"tags3":["MYR RM103,000.00/Yr."],"tags4":["Global Careers (External)"],"department":"","benefits":[],"employment_type":"FULL_TIME","qualifications":"<p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","hiring_organization":"Advanced Micro Devices, Inc","hiring_organization_logo":"https://www.amd.com/content/dam/code/images/header/amd-header-logo.svg","responsibilities":"<p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">THE ROLE:</span></strong><span style=\\"color: black;\\"><br />Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.</span></span></p><p style=\\"margin: 0px;\\"><span style=\\"color: black; font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"> </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow</span><br /><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Proficient with Verilog, System Verilog and UVM.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with power aware simulation and firmware/hardware co-verification is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Strong analytical and problem-solving skills with pronounced attention to detail.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Scripting language experience: Perl, Ruby, Makefile, shell is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">ACADEMIC CREDENTIALS:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.</span></li></ul><p><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">LOCATION</span></strong></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Penang, Malaysia</span></p><p> </p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-FL1</span></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-Hybrid</span></p>","posted_date":"2023-11-20T08:05:00+0000","apply_url":"https://global-external-amd.icims.com/jobs/36617/login","internal":false,"searchable":true,"active":true,"applyable":true,"li_easy_applyable":true,"ats_code":"icims","hiring_flow_name":"iCIMS ATS Hiring Flow","meta_data":{"openingjobs":{"openingJobId":"0000dee14c71da5191d2dee89102fc26e0c4"},"icims":{"revision_int":2,"uuid":"a1cf04e9-80ef-43db-b2f0-fad854ffc690","primary_posted_site_object":{"datePosted":"2023-11-20T08:05:00+0000","site":"global-external-amd","siteId":"ee6869a0-dcc6-4a8b-b7dd-e8c8665cd45a"},"date_updated":"2023-11-20T08:06:28Z","config_keys":null,"jps_is_public":true},"elasticsearch":{"es_created":false},"ats_job_hash":"defd1bbefc98fd8d973a1d361d611cb3","googlejobs":{"jobName":"projects/helpful-passage-853/tenants/cb22eb5b-7e00-0000-0000-007edad744d3/jobs/86067999049425606"},"import_id":"8e0b9730-3759-4873-b1d7-962c2f551654","redirectOnApply":true,"questionservice":{"id":"29607780"},"import_source":"ImporterService","client_code":"amd"},"update_date":"2023-11-20T08:07:02+0000","create_date":"2023-11-20T08:06:03+0000"},"jobFormatted":{"categories":"Engineering","location":"Penang, Malaysia","title":"Silicon Design Verification Engineer","seo_title":["Engineering","Penang%2C+Malaysia","Silicon+Design+Verification+Engineer"],"description":"<strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">WHAT YOU DO AT AMD CHANGES EVERYTHING</span></strong></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD together we advance_</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">THE ROLE:</span></strong><span style=\\"color: black;\\"><br />Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.</span></span></p><p style=\\"margin: 0px;\\"><span style=\\"color: black; font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"> </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow</span><br /><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Proficient with Verilog, System Verilog and UVM.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with power aware simulation and firmware/hardware co-verification is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Strong analytical and problem-solving skills with pronounced attention to detail.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Scripting language experience: Perl, Ruby, Makefile, shell is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">ACADEMIC CREDENTIALS:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.</span></li></ul><p><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">LOCATION</span></strong></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Penang, Malaysia</span></p><p> </p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-FL1</span></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-Hybrid</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","qualifications":"<p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","responsibilities":"<p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">THE ROLE:</span></strong><span style=\\"color: black;\\"><br />Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.</span></span></p><p style=\\"margin: 0px;\\"><span style=\\"color: black; font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"> </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow</span><br /><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Proficient with Verilog, System Verilog and UVM.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with power aware simulation and firmware/hardware co-verification is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Strong analytical and problem-solving skills with pronounced attention to detail.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Scripting language experience: Perl, Ruby, Makefile, shell is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">ACADEMIC CREDENTIALS:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.</span></li></ul><p><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">LOCATION</span></strong></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Penang, Malaysia</span></p><p> </p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-FL1</span></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-Hybrid</span></p>","clientName":"AMD | Careers Home","locations":"Penang, Malaysia"},"jdSettings":{"options":{"metadata":{"options":{"enabled":false,"data":[]},"categories":{"enabled":true},"locations":{"enabled":true},"req_id":{"enabled":true},"placement":"top"},"video":{"enabled":false,"placement":"above_description"},"displayFields":{"fieldOrder":["locations","categories","req_id","tags5","tags6"],"fields":[{"item":"req_id","token":"JOB_DESCRIPTION.REQ_ID","ariaLabel":"JOB_DESCRIPTION.REQ_ID_ARIA_LABEL"},{"item":"locations","token":"JOB_DESCRIPTION.LOCATION","ariaLabel":"JOB_DESCRIPTION.LOCATION_ARIA_LABEL","fieldType":"location"},{"item":"categories","token":"JOB_DESCRIPTION.CATEGORIES","ariaLabel":"JOB_DESCRIPTION.CATEGORIES_ARIA_LABEL","objectArrayKey":"name"},{"item":"tags6","token":"JOB_DESCRIPTION.TAGS6","ariaLabel":"JOB_DESCRIPTION.TAGS6_ARIA_LABEL"},{"item":"tags5","token":"JOB_DESCRIPTION.TAGS5","ariaLabel":"JOB_DESCRIPTION.TAGS5_ARIA_LABEL"}]}}},"sectionOrder":["description"],"getReferredEnabled":false,"addThisDisabled":true,"externalTrackifEnabled":false,"jibeTrackifEnabled":false,"brandName":"careers-home","globalSearchEnabled":false,"jobLangData":[],"referrals":{"enabled":false,"recruit":false},"seoMetaData":{"clientName":"AMD | Careers Home","data":{"slug":"36617","category":[" Engineering"],"full_location":"Penang, Malaysia","short_location":"Penang, Malaysia","language":"en-us","languages":["en-us"],"client_code":"amd","req_id":"36617","title":"Silicon Design Verification Engineer","description":"<strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">WHAT YOU DO AT AMD CHANGES EVERYTHING</span></strong></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD together we advance_</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">THE ROLE:</span></strong><span style=\\"color: black;\\"><br />Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.</span></span></p><p style=\\"margin: 0px;\\"><span style=\\"color: black; font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"> </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow</span><br /><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Proficient with Verilog, System Verilog and UVM.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with power aware simulation and firmware/hardware co-verification is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Strong analytical and problem-solving skills with pronounced attention to detail.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Scripting language experience: Perl, Ruby, Makefile, shell is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">ACADEMIC CREDENTIALS:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.</span></li></ul><p><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">LOCATION</span></strong></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Penang, Malaysia</span></p><p> </p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-FL1</span></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-Hybrid</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","location_name":"MY,Penang","street_address":"Hotel Equatorial, Jalan Bukit Jambul","city":"Penang","state":"Pulau Pinang","country":"Malaysia","country_code":"MY","postal_code":"11900","location_type":"LAT_LNG","latitude":5.3294,"longitude":100.2907,"additional_locations":[],"categories":[{"name":"Engineering"}],"tags1":["No"],"tags2":["MYR RM72,100.00/Yr."],"tags3":["MYR RM103,000.00/Yr."],"tags4":["Global Careers (External)"],"department":"","benefits":[],"employment_type":"FULL_TIME","qualifications":"<p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","hiring_organization":"Advanced Micro Devices, Inc","hiring_organization_logo":"https://www.amd.com/content/dam/code/images/header/amd-header-logo.svg","responsibilities":"<p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">THE ROLE:</span></strong><span style=\\"color: black;\\"><br />Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.</span></span></p><p style=\\"margin: 0px;\\"><span style=\\"color: black; font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"> </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow</span><br /><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Proficient with Verilog, System Verilog and UVM.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with power aware simulation and firmware/hardware co-verification is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Strong analytical and problem-solving skills with pronounced attention to detail.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Scripting language experience: Perl, Ruby, Makefile, shell is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">ACADEMIC CREDENTIALS:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.</span></li></ul><p><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">LOCATION</span></strong></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Penang, Malaysia</span></p><p> </p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-FL1</span></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-Hybrid</span></p>","posted_date":"2023-11-20T08:05:00+0000","apply_url":"https://global-external-amd.icims.com/jobs/36617/login","internal":false,"searchable":true,"active":true,"applyable":true,"li_easy_applyable":true,"ats_code":"icims","hiring_flow_name":"iCIMS ATS Hiring Flow","meta_data":{"openingjobs":{"openingJobId":"0000dee14c71da5191d2dee89102fc26e0c4"},"icims":{"revision_int":2,"uuid":"a1cf04e9-80ef-43db-b2f0-fad854ffc690","primary_posted_site_object":{"datePosted":"2023-11-20T08:05:00+0000","site":"global-external-amd","siteId":"ee6869a0-dcc6-4a8b-b7dd-e8c8665cd45a"},"date_updated":"2023-11-20T08:06:28Z","config_keys":null,"jps_is_public":true},"elasticsearch":{"es_created":false},"ats_job_hash":"defd1bbefc98fd8d973a1d361d611cb3","googlejobs":{"jobName":"projects/helpful-passage-853/tenants/cb22eb5b-7e00-0000-0000-007edad744d3/jobs/86067999049425606"},"import_id":"8e0b9730-3759-4873-b1d7-962c2f551654","redirectOnApply":true,"questionservice":{"id":"29607780"},"import_source":"ImporterService","client_code":"amd"},"update_date":"2023-11-20T08:07:02+0000","create_date":"2023-11-20T08:06:03+0000"},"formattedData":{"categories":"Engineering","location":"Penang, Malaysia","title":"Silicon Design Verification Engineer","seo_title":["Engineering","Penang%2C+Malaysia","Silicon+Design+Verification+Engineer"],"description":"<strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">WHAT YOU DO AT AMD CHANGES EVERYTHING</span></strong></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD together we advance_</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">THE ROLE:</span></strong><span style=\\"color: black;\\"><br />Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.</span></span></p><p style=\\"margin: 0px;\\"><span style=\\"color: black; font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"> </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow</span><br /><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Proficient with Verilog, System Verilog and UVM.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with power aware simulation and firmware/hardware co-verification is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Strong analytical and problem-solving skills with pronounced attention to detail.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Scripting language experience: Perl, Ruby, Makefile, shell is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">ACADEMIC CREDENTIALS:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.</span></li></ul><p><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">LOCATION</span></strong></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Penang, Malaysia</span></p><p> </p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-FL1</span></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-Hybrid</span></p> <br><strong class=\\"jdheading\\"></strong><br><br><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","qualifications":"<p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Benefits offered are described: </span></em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><a href=\\"https://amd.jibeapply.com/benefits\\" target=\\"_blank\\" rel=\\"noopener\\">AMD benefits at a glance</a>.</span></p><p style=\\"margin: 0px;\\"> </p><p style=\\"margin: 0px;\\"><em><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.</span></em></p>","responsibilities":"<p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">THE ROLE:</span></strong><span style=\\"color: black;\\"><br />Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.</span></span></p><p style=\\"margin: 0px;\\"><span style=\\"color: black; font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"> </span></p><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">KEY RESPONSIBILITIES:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">PREFERRED EXPERIENCE:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow</span><br /><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Proficient with Verilog, System Verilog and UVM.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with power aware simulation and firmware/hardware co-verification is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Strong analytical and problem-solving skills with pronounced attention to detail.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Scripting language experience: Perl, Ruby, Makefile, shell is a plus.</span></li><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.</span></li></ul><p style=\\"margin: 0px;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\"><strong><span style=\\"color: black;\\">ACADEMIC CREDENTIALS:</span></strong></span></p><ul><li style=\\"color: black;\\"><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.</span></li></ul><p><strong><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">LOCATION</span></strong></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">Penang, Malaysia</span></p><p> </p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-FL1</span></p><p><span style=\\"font-family: arial, helvetica, sans-serif; font-size: 12pt;\\">#LI-Hybrid</span></p>","clientName":"AMD | Careers Home","locations":"Penang, Malaysia"}},"isNoIndex":false,"preloginConfiguration":null,"contextSettings":{"contextDefinitions":[{"name":"careers-home","displayName":"AMD | Careers Home","metadata":{"title":"Career Opportunities | AMD Careers","description":"AMD offers the opportunity to learn and build careers. Search for Opportunities to Apply Now."}},{"name":"benefits","displayName":"AMD | Benefits","metadata":{"title":"Employee Benefits and Perks | AMD Careers","description":"By offering market competitive, inclusive benefits & perks that AMDers value most, AMD enables an environment where we can all do our best work. Learn More."}},{"name":"students","displayName":"AMD | Students","metadata":{"title":"Student Jobs | Internship & Co-op opportunities | AMD Careers","description":"AMD offers the opportunity to learn and build careers for students. Search for Internships & Co-op Opportunities to Apply Now."}},{"name":"events","displayName":"AMD","metadata":{"title":"Student Jobs | Internship & Co-op opportunities | AMD Careers","description":"AMD offers the opportunity to learn and build careers for students. Search for Internships & Co-op Opportunities to Apply Now."}},{"redirectToForm":false,"successCTAButtonEnabled":false,"name":"talent-network","displayName":"AMD Talent Community","urlPath":"/talent-network","overrides":{"talentcommunity.integration.v2":{"enabled":true,"questionSet":{"en-US":2139042}}},"createdAt":"2022-08-31T10:28:28+0000","creatorId":138758503,"creatorName":"rick.sheffield@amd.com","updatedAt":"2022-11-02T09:58:53+0000"},{"redirectToForm":false,"successCTAButtonEnabled":false,"name":"student-talent-network","displayName":"AMD Student Talent Community","metadata":{"title":"Student Talent Community | AMD Careers","description":"Join our AMD Student Talent Community. Create a profile with your information in our system so that our recruiters can match you with new opportunities."},"urlPath":"/student-talent-network","overrides":{"talentcommunity.integration.v2":{"enabled":true,"questionSet":{"en-US":2155368}}},"createdAt":"2022-11-02T09:57:12+0000","creatorId":138758432,"creatorName":"Doreen.Dockweiler@amd.com","updatedAt":"2022-11-08T16:30:28+0000"},{"displayName":"University Programs - Dublin ","displayFormDetails":false,"overrides":{"talentcommunity.integration.v2":{"enabled":true,"questionSet":{"en-US":2155368}}},"eventDetailsConfig":{"showDateTime":false,"showDirections":false,"showVenueName":false,"showVenueAddress":false,"showEventCategory":false,"showDescription":false},"creatorId":141724339,"creatorName":"romigiddi3768","createdAt":"2023-06-08T10:26:27+0000","updatedAt":"2023-06-08T10:26:27+0000","name":"event-3714","urlPath":"/event-3714","isEvent":"true"}],"defaultContext":"careers-home","currentContext":"careers-home","redirectWithSources":true,"currentClient":"amd"},"similarJobsEnabled":false,"login":{},"inhouseAlertsEnabled":true}; </script>\n<script> window.jobDescriptionTemplates = {\n sectionTop: "<!-- FOR BRANDING ELEMENTS TO BE PLACED ABOVE JOB DESCRIPTION BODY -->",\n sectionBottom: "<!-- FOR BRANDING ELEMENTS TO BE PLACED BELOW JOB DESCRIPTION BODY -->",\n additionalButton: "<!-- additional button on JD page -->",\n getReferred: "<a href=\\"undefined\\" class=\\"get-referred cta-button\\">\\n <span class=\\"fa fa-users\\" aria-hidden=\\"true\\"></span>\\n Get Referred\\n</a>",\n rightRailMedia: "",\n};\n</script>\n\n <script src="https://app.jibecdn.com/prod/descriptions/1.1.45/polyfills-es5.js" nomodule=""></script>\n <script src="https://app.jibecdn.com/prod/descriptions/1.1.45/polyfills.js"></script>\n <script src="https://app.jibecdn.com/prod/descriptions/1.1.45/scripts.js"></script>\n <script src="https://app.jibecdn.com/prod/descriptions/1.1.45/main.js"></script>\n\n\n\n <script src="https://app.jibecdn.com/prod/social-share/0.0.34/runtime.js"></script>\n <script src="https://app.jibecdn.com/prod/social-share/0.0.34/polyfills.js"></script>\n <script src="https://app.jibecdn.com/prod/social-share/0.0.34/polyfills-es5.js" nomodule=""></script>\n <script src="https://app.jibecdn.com/prod/social-share/0.0.34/vendor.js"></script>\n <script src="https://app.jibecdn.com/prod/social-share/0.0.34/main.js"></script>\n\n\n\n\n\n\n<script>window['_jobchat_host']='https://app.textrecruit.com';window['_jobchat_cloud_environment']='aws-prd';window['_jobchat_account']='62ec562519ce1e45f49eafe3';window['_jobchat_namespace']='JC';(function(w,d,namespace,s,u){varo=d.createElement(s);o.async=1;o.src=_jobchat_host+'/js/jobchat.js';vary=d.getElementsByTagName(s)[0];y.parentNode.insertBefore(o,y);})(window,document,window['_jc_namespace'],'script','user');</script>\n\n<script data-cookieconsent="statistics">\n
\n
/**
\n
\n
@description: send an arbitrary payload to the server-side for later consumption.
\n
@param {Object} payload - a json payload that contains arbitrary data
\n
@param {String} payload.event_name - the unique name to associate with the event
\n
@param {String} payload.slug - the job id to associate with the event
\n
@param {String} payload.language - the locale to associate with the event\n */\n function sendEvent(payload) {\n// validation check\nif (!(payload || payload.event_name)) {\n console.error('insufficient data for meaningful response.');\n return;\n}
\n
\n
else {\n\n // send ajax request to backend for consumption\n $.ajax({\n method: 'POST',\n url: '/api/impression',\n data: payload,\n success: function (res) {\n // console.log('successful ajax call with response: ', res);\n }\n });\n}\n
\n","datePosted":"2023-11-20T14:16:36.440Z","validThrough":"2023-11-24","employmentType":[],"hiringOrganization":{"@type":"Organization","name":"AMD","description":"We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.","numberOfEmployees":29530,"address":[{"address":{"@type":"PostalAddress","addressLocality":"Santa Clara, CA, USA"}}],"sameAs":"https://amd.com","url":"https://amd.com","logo":"https://cdn.getro.com/companies/62a45b10-e181-5002-be73-b19d9b6556b2-1724247099","memberOf":{"@type":"Organization","name":"Discover Technata","description":"","logo":"https://cdn.filepicker.io/api/file/ZHKoz7xpS2CHyRs3XEB9","url":"jobs.discovertechnata.com"},"keywords":"Consumer Products, DeepTech, Hardware, Internet Services, Manufacturing, Software"},"jobLocation":{"@type":"Place","address":{"@type":"PostalAddress","addressLocality":"Penang, Malaysia"}}}
AMD does not require or seek to collect a fee or payment from candidates in the application or interview process. We do not conduct interviews by text messaging. Nor does AMD require copies of IDs, passports, or other identification as a part of the interview process. If you have experienced these requests, this is a scam, and you may wish to consider making a report to ReportFraud.ftc.gov or IC3.gov. We encourage job seekers interested in AMD roles to apply on the amd.com Careers page.
For AMD employees looking to refer someone or search for new opportunities, please use the Internal Career Site.
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE: Push Boundaries, Deliver Innovation and Change the World! In this role you will be given an opportunity to work on the next generation technology that will be part of future AMD Microprocessors powering Gaming Consoles, Servers and Personal Computers as well as Graphics Cards and VR sets. This team also is responsible for the Design and Verification of several critical as well as the integration to other subsystems and SOC. The Design and Design Verification groups within this team are also responsible for developing a balanced architecture between power consumption and performance, delivering high complexity RTL code and creating advanced testbenches using cutting edge verification techniques.
KEY RESPONSIBILITIES:
Collaborate with design team to understand and define verification requirements for high-speed, low power digital circuit designs from definition to implementation.
Own and be involved in all aspects of the functional verification from initial test planning, test creation and debug. to coverage and sign-off closure.
Own and implement verification of high speed, low power digital designs at IP and System level using both coverage driven constraint random and directed testing techniques as well as formal verification.
Implement test benches and components such as test and sequence libraries, monitors, models and BFMs by applying objected oriented programming verification techniques following UVM methodology.
PREFERRED EXPERIENCE:
Advanced knowledge of ASIC/SOC Design flow and state of the art verification flow Proficient with Verilog, System Verilog and UVM.
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language. (SVA, UVM scoreboard)
Familiarity with power aware simulation and firmware/hardware co-verification is a plus.
Familiarity with industry standard high-speed protocols such as USB, PCIE, UFS, SATA, Ethernet is a plus.
Familiarity with industry standard interconnects such as AMBA (AXI, APB, AHB) is a plus.
Strong analytical and problem-solving skills with pronounced attention to detail.
Scripting language experience: Perl, Ruby, Makefile, shell is a plus.
Capable of independently driving tasks and activities to completion in an organized and timely manner with excellent quality.
ACADEMIC CREDENTIALS:
Major in EE, CS or related, Master’s Degree with 3+ years or Bachelor’s with 5+ years working experiences.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.